151
formula 14.7456MHz / (16 + 2 * BR * Divisor). If the bitRate parameter is omitted or is zero the value of
66 is used by default.
Channel 0 Prescaler Selector Value
Value
Divisor
0
1
1
4
2
16
3
64
For channels 1-4 the bitRate parameter is interpreted as the number of I/O Timer ticks per bit. For I2C
operations, The I/O Timer uses the prescaler specified by Register.TimerSpeed1. With the default
prescaler of 1 each I/O Timer tick represents approximately 68nS. If the bitRate parameter is omitted
or is zero the value of 74 is used by default. Due to processing overhead, the minimum attainable bit time
is approximately 4µS.
For channel 0, the table below gives the pin numbers used for SDA and SCL.
SDA and SCL Pins
ZX Models
SDA
SCL
ZX-24, ZX-24a, ZX-24p, ZX-24n
11, C.1
12, C.0
ZX-40, ZX-40a, ZX-40p, ZX-40n
23, C.1
22, C.0
ZX-44, ZX-44a, ZX-44p, ZX-44n
20, C.1
19, C.0
ZX-24e, ZX-24ae
11, C.1
12, C.0
ZX-1281, ZX-1281n
26, D.1
25, D.0
ZX-1280, ZX-1280n
44, D.1
43, D.0
ZX-128e, ZX-1281e
11, D.1
12, D.0
Examples
' open the hardware channel at 100KHz
' open channel 2 using pins 19, 20
Call OpenI2C(1, C.3, A.1, 74) ' open channel 1 at 200KHz
Resource Usage
The I2C routines utilize the I/O Timer to regulate the bit timing for channels 1-4. While sending or
receiving I2C data, the corresponding timer busy flag will be True indicating that the I/O Timer is in use.
On the ZX-24p and ZX-24n, the hardware I2C channel cannot be used while Com2 is open since pin 11
is shared by the SDA signal and TxD for Com2.
Compatibility
This subroutine is not available in BasicX compatibility mode.
See Also