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With all of the mode values in the table above, the analog comparator’s positive input is AIN0 (Port B, bit
2) and the comparator’s negative input is either AIN1 (Port B, bit 3) or, if the ACME bit is set in a CPU
register (see below), the analog input specified by the multiplexor select bits in Register.ADMUX.  On the
ZX-24 models, AIN0 is common with Port A, bit 2 so the latter I/O pin will need to be configured to be an
input in high-impedance mode.  Also, on the ZX-24 models, AIN1 has no external connection so the
negative input must be supplied via the analog multiplexor.  The ACME bit is in Register.SFIOR for the
mega32 and mega128-based ZX models and in Register.ADCSRB in the mega644, mega644P,
mega1280 and mega1281-based  ZX models.
Another option for the positive comparator input is to select the internal “band gap” voltage.  This voltage
level (approximately 1.23 volts) is selected by adding &H40 to the mode values in the table above.   The
built-in constant zxAnalogReference has this value.
See the section in the Atmel microcontroller documentation describing the analog comparator for further
details.
Pin Change Interrupts
For ZX models based on the mega644, mega644P, mega1280 and mega1281 CPUs, a task may await a
state change on one or more pins of an I/O port.  This mode is selected by specifying a special value for
the intNum parameter according to the tables below for the respective CPU types.
intNum Values for Pin Change Interrupts
Value
Built-in Constant
Trigger – mega644,P
Trigger – mega1281
Trigger – mega1280
&H20
WaitPinChangeA
Pin change on Port A
&H21
WaitPinChangeB
Pin change on Port B
Pin change on Port B
Pin change on Port B
&H22
WaitPinChangeC
Pin change on Port C
&H23
WaitPinChangeD
Pin change on Port D
&H24
WaitPinChangeE
Change on Port Bit E.0¹
&H29
WaitPinChangeJ
Pin change on Port J²
&H2a
WaitPinChangeK
Pin change on Port K
¹Not available on the ZX-1281e.
²Bits 0-6 only.
For each of the intNum values in the table above, the mode parameter specifies pin change interrupt
enable bits corresponding to each pin of the port.  For example, if the mode value is &H21, a pin change
interrupt will be generated if either bit 0 or bit 5 of the specified port changes state.  Clearly, a mode value
of zero is useless since no pin change interrupt can ever occur in that case.
When the trigger condition occurs an interrupt will be generated and the task awaiting the interrupt will
rise to the highest priority.  This will cause an immediate task switch meaning that the next instruction that
executes will be the one following the WaitForInterrupt() invocation.  Note that if another task
performs an action that causes interrupts to be disabled, response to the interrupt will be delayed until
interrupts are re-enabled.  The fact that the current task is locked does not prevent the interrupt task from
executing next.
Interrupt Priority
If two or more interrupts occur simultaneously, the task awaiting the highest priority interrupt is activated
first.  The priorities of the various interrupts are given in the table below.
  
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